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ISL59832
Data Sheet June 11, 2008 FN6267.1
Dual Channel, Single Supply Video Reconstruction Filter with Charge Pump
The ISL59832 is a dual channel, single supply video driver with reconstruction filter and charge pump. It is designed to drive SDTV displays with S-Video (Y/C) signals. It operates on a single supply (3.0V to 3.6V) and generates its own negative supply (-1.5V) using a regulated charge pump. Input signals can be AC- or DC-coupled. When AC-coupled, the sync tip clamp sets the blank level to ground at the output of Channel 1 thus ensuring that the sync-tip voltage level is set to approximately -300mV at the back-termination resistor of a standard video load. Channel 1 also has a sync detector whose output is available at SYNC_OUT pin. In a typical application where the luma is connected to Channel 1, and chrominance is connected to Channel 2, SYNC_IN is connected to SYNC_OUT thus providing timing to Channel 2. Channel 2 has a keyed clamp which sets the output to ground when SYNC_IN is driven to the logic high state. The ISL59832 is capable of driving two DC- or AC-coupled standard video loads. The ISL59832 features a 4th order Butterworth reconstruction filter that provides a 9MHz nominal -3dB frequency and 40dB of attenuation at 27MHz. Nominal operational current is 31mA. When powered down, the device draws 1A maximum supply current. The ISL59832 is available in 16 Ld TQFN package.
Features
* 3.3V Nominal Supply, Operates Down to 3.0V * DC-Coupled Outputs * Inputs can be AC- or DC-Coupled * Eliminates the Need for Large Output Coupling Capacitors * Integrated Sync Tip Clamp sets Backporch to Ground at the Output For Channel 1 for 1VP-P Standard Video Signal * Integrated Keyed Clamp Puts Channel 2 Output to Ground During Sync * Each Output Drives 2 Standard Video Loads * Response Flat to 5MHz, with 40dB Attenuation at 27MHz * Pb-Free (RoHS compliant)
Pinout
ISL59832 (16 LD TQFN) TOP VIEW
VEEIN 14 OUT1 OUT2 VEEOUT 13 12 CAP+ EP 11 CAP10 VCP 9 5 IN1 6 GND 7 IN2 8 GND GNDCP
16 SYNC_IN 1 SYNC_OUT 2 VS 3
15
Ordering Information
PART NUMBER ISL59832IRZ PART MARKING TEMP. RANGE (C) PACKAGE (Pb-Free) PKG. DWG. # MDP0046
ENABLE 4
59 832IRZ -40 to +85 16 Ld TQFN
NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
Block Diagram
ISL59832
CHANNEL 1
Applications
* Set Top Box Receiver * Television * DVD Player
VIDEO IN (Y)
CLAMP + SYNC DETECTOR
LPF
x2
9MHz CHARGE PUMP
VIDEO OUT (Y)
CHANNEL 2 VIDEO IN (C) KEYED CLAMP LPF VIDEO OUT (C)
x2
9MHz CHARGE PUMP
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2008. All Rights Reserved All other trademarks mentioned are the property of their respective owners.
ISL59832
Absolute Maximum Ratings (TA = +25C)
VS to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4V VIN to GND. . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to VS + 0.3V Maximum Continuous Output Current . . . . . . . . . . . . . . . . . . 50mA Maximum Current into Any Pin . . . . . . . . . . . . . . . . . . . . . . . 50mA ESD Rating Human Body Model (Per MIL-STD-883 Method 3015.7) . . .3500V Machine Model (Per EIAJ ED-4701 Method C-111) . . . . . . . .350V
Thermal Information
or Thermal Resistance (Typical, Note 1) JA (C/W) 16 Lead TQFN Package . . . . . . . . . . . . . . . . . . . . . 46 Maximum Junction Temperature (Plastic Package) . . . . . . . +150C Maximum Storage Temperature Range . . . . . . . . . .-65C to +150C Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . .-40C to +85C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
NOTES: 1. JA is measured in free air with the component mounted on a high effective thermal conductivity test board with "direct attach" features. See Tech Brief TB379. 2. Parameters with MIN and/or MAX limits are 100% tested at +27C, unless otherwise specified. Temperature limits established by characterization and are not production tested.
Electrical Specifications
VS = VCP = 3.3V, CF = 0.1F, CS = 0.22F, CFIL = 0.4F, CIN1 = CIN2 = 0.1F, RL1 = RL2 = 150, Typical TA = +27C. PARAMETER CONDITIONS MIN (Note 2) TYP MAX (Note 2) UNIT
SYMBOL DC CHARACTERISTICS VS, VCP VEEOUT IS ICP IPD IIN IB AV VIN_MAX VCLAMPOUT1 VCLAMPOUT2 VCLAMPIN VCLAMPIN2 VOS
Supply Range Charge Pump Output Supply Current Charge Pump Supply Current Power-Down Current Input Pull-down Current Input Bias Current DC Gain Max DC Input Range Output Sync Tip Clamp Level (Channel 1) Keyed Clamp Level (Channel 2) Input Clamp Level Input Keyed Clamp Level (Channel 2) Output Level Shift (Channel 1) Output Level Shift (Channel 2)
guaranteed by PSRR
3.0 -1.75
3.3 -1.5 14 17 0.3
3.6 -1.25 16 20 2.5 10 10 2.05
V V mA mA A A A V/V V
No load No load ENABLE = 0.4V Channel 1, VIN = 0.5V Channel 2, VIN = 0.5V, SYNC_IN = 0V 0.4 -10 1.94 DC-Coupled Input, guaranteed by DC gain test VIN 0, AC-coupled input Output level when SYNC_IN = 2.0V Input floating Input floating, input level when SYNC_IN 2.0V VIN > 0, output shifted relative to input, DC-coupled input VIN > 0, output shifted relative to input, DC-coupled input 1.4 -650 -60 0 275 -685 -380
4 -3 2
-590 -25 30 300 -620 -330
-525 0 70 375 -550 -280
mV mV mV mV mV mV
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FN6267.1 June 11, 2008
ISL59832
Electrical Specifications
VS = VCP = 3.3V, CF = 0.1F, CS = 0.22F, CFIL = 0.4F, CIN1 = CIN2 = 0.1F, RL1 = RL2 = 150, Typical TA = +27C. (Continued) PARAMETER Clamp Restore Current CONDITIONS Force VIN = -0.3V, Channel 1 Force VIN = 1V, Channel 2 Force VIN = -0.3V, Channel 2 VSLICE PSRRDC Sync Detect Threshold Power Supply Rejection Channel 1 VS = +3.0 to +3.6 100 50 77 135 MIN (Note 2) TYP -5 180 -200 -160 200 MAX (Note 2) -2.5 UNIT mA A A mV dB
SYMBOL ICLAMP
AC CHARACTERISTICS APB ASB dG dP SNR GDMATCH GD PSRR XTALK VNOISE Passband Flatness Stopband Attenuation Differential Gain Differential Phase Signal To Noise Ratio DC Group Delay Match Group Delay Deviation Power Supply Rejection Channel-to-Channel Crosstalk Input Voltage Noise f = 5MHz, relative to 100kHz f 27MHz relative to 100kHz 11-step modulated staircase 11-step modulated staircase Peak signal (1.4VP-P) to RMS noise, f = 10kHz to 10MHz Channel-to-channel group delay matching at 100kHz Deviation from 100kHz to 3.58MHz VIN = 100mVP-P sine wave, f = 100kHz to 5MHz f = 100kHz to 5MHz 0 0.8 -50 0.45 -0.15 66 0.1 8 35 -60 0.66 1.25 -35 dB dB % dB ns ns dB dB mVRMS
LOGIC (ENABLE, SYNC_IN) VIL VIH II CHARGE PUMP fCP Charge Pump Clock Frequency 12.5 MHz Logic Low Input Voltage Logic High Input Voltage Logic Input Current 2.0 -1 1 0.8 V V A
3
FN6267.1 June 11, 2008
ISL59832 Pin Descriptions
NUMBER 1 2 3 4 5 6, 8 7 9 10 11 12 13 14 15 16 NAME SYNC_IN SYNC_OUT VS ENABLE IN1 GND IN2 GNDCP VCP CAPCAP+ VEEOUT VEEIN OUT2 OUT1 EP FUNCTION Sync Input. Sync timing logic input for Channel 2. Sync Output. Sync-detection logic output from Channel 1. Positive Power Supply. Bypass to GND with a 0.1F capacitor. Enable. Connect to VS to enable device. Video Input 1. Luma Channel. Ground Video Input 2. Chroma Channel. Charge Pump Ground. Charge Pump Power Supply. Bypass with a 0.1F capacitor to GNDCP. Charge-Pump Flying Capacitor Negative Terminal. Connect a 0.1F capacitor from CAP+ to CAPCharge-Pump Flying Capacitor Positive Terminal. Connect a 0.1F capacitor from CAP+ to CAPCharge Pump Negative Output. Bypass with a 0.22F capacitor to GND. Negative Supply. Connect an RC filter between VEEIN and VEEOUT. See "S-Video Typical Application Circuit" on page 6. Video Output 2 Video Output 1 Exposed Pad. Connect to VEEIN
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FN6267.1 June 11, 2008
ISL59832 Block Diagram
VS SYNC_OUT ENABLE
SYNC DETECTOR
LPF IN1 9MHz
LEVEL SHIFT (-310mV)
X2
OUT1
VEEIN + -593mV
LPF IN2 9MHz
LEVEL SHIFT (-165mV)
X2
OUT2
VEEIN KEYED CLAMP +
0V SYNC_IN
ISL59832
CHARGE PUMP
VEEIN
GND
VEEOUT
GNDCP
CAP+
CAP-
VCP
5
FN6267.1 June 11, 2008
ISL59832 S-Video Typical Application Circuit
+3.3V
0.1F
4.7F
ENABLE
VS SYNC_OUT SYNC_IN
0.1F Luma Source 75 IN1 OUT1
75 75
ISL59832
0.1F Chrominance Source 75 IN2 OUT2 75 75
VEEIN 10 VEEOUT 0.22F CS 0.47F CFIL RFIL
+3.3V VCP 0.1F GND CAP+ CF 0.1F CAPGNDCP CCP1 1.0F CCP2
6
FN6267.1 June 11, 2008
ISL59832 Typical Performance Curves
10 0 MAGNITUDE (dB) MAGNITUDE (dB) -10 -20 -30 -40 -50 -60 -70 0.1 CHANNEL 1 RL = 150 CHANNEL 1 RL = 75 1M 10M FREQUENCY (Hz) 100M CHANNEL 2 RL = 150 CHANNEL 2 RL = 75
VCP = VS = 3.3V, CF = 0.1F, CS = 0.22F, CFIL = 0.4F, CIN1= CIN2 = 0.1F, RL1= RL2 = 150.
2 1 0 -1 -2 -3 -4 -5 0.1 1M FREQUENCY (Hz) 10M CHANNEL 1 RL = 150 CHANNEL 2 RL = 150 CHANNEL 2 RL = 75 CHANNEL 1 RL = 75
FIGURE 1. BANDWIDTH vs FREQUENCY
FIGURE 2. GAIN FLATNESS vs FREQUENCY
50 CHARGE PUMP VOLTAGE (V) 40 30 DELAY (ns) 20 10 0 -10 -20 -30 -40 0.1 1M 10M FREQUENCY (Hz) 100M CHANNEL 2 CHROMA CHANNEL 1 LUMA
-1.40 -1.41 -1.42 -1.43 -1.44 -1.45 -1.46 -1.47 -1.48 2.7 VCP = 3.3V VS = 2.7V TO 3.6V 2.8 2.9 VS = 3.3V VCP = 2.7 TO 3.6V
ALL MEASUREMENTS AT VEEIN
VCP = VS = 2.7V TO 3.6V
3.0 3.1 3.2 3.3 SUPPLY VOLTAGE (V)
3.4
3.5
3.6
FIGURE 3. GROUP DELAY vs FREQUENCY
FIGURE 4. CHARGE PUMP VOLTAGE vs SUPPLY VOLTAGE
0 -10 -20 MAGNITUDE (dB) -30 -40 -50 -60 -70 -80 -90 -100 0.1 1M 10M FREQUENCY (Hz) 100M ENABLE = LOW ANY INPUT TO ANY OUTPUT MAGNITUDE (dB)
0 INPUT OF CHANNEL 1 TO OUTPUT OF -10 CHANNEL 2 AND VICE-VERSA -20 -30 -40 -50 -60 -70 0.1 1M 10M FREQUENCY (Hz) 100M
FIGURE 5. INPUT-TO-OUTPUT ISOLATION vs FREQUENCY
FIGURE 6. LUMA-TO-CHROMA CROSSTALK
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FN6267.1 June 11, 2008
ISL59832 Typical Performance Curves
35 34 SUPPLY CURRENT (mA) 33 32 31 30 29 28 27 26 25 3.0 3.1 3.2 3.3 3.4 SUPPLY VOLTAGE (V) 3.5 3.6 NO LOAD INPUT FLOATING
VCP = VS = 3.3V, CF = 0.1F, CS = 0.22F, CFIL = 0.4F, CIN1= CIN2 = 0.1F, RL1= RL2 = 150.
DISABLED SUPPLY CURRENT (nA) 400 350 300 250 200 150 100 50 0 3.0 3.1 3.2 3.3 3.4 SUPPLY VOLTAGE (V) 3.5 3.6 NO LOAD INPUT FLOATING
FIGURE 7. SUPPLY CURRENT vs SUPPLY VOLTAGE
FIGURE 8. DISABLED SUPPLY CURRENT vs SUPPLY VOLTAGE
30 25 IMPEDANCE () MAGNITUDE (dB) 20 15 10 5 0 0.1
0 -10 -20 -30 -40 -50 -60 0.001 VAC = 100mVP-P VS = +3.3V + VAC
1M 10M FREQUENCY (Hz)
100M
0.01
0.1 FREQUENCY (Hz)
1M
10M
FIGURE 9. OUTPUT IMPEDANCE vs FREQUENCY
FIGURE 10. POWER SUPPLY REJECTION RATIO vs FREQUENCY
0.05 0.03 0.01 -0.01
DG (%)
DP ()
0.6
WAVEFORM = MODULATED RAMP 0 IRE TO 100 IRE
WAVEFORM = MODULATED RAMP 0.5 0 IRE to 100 IRE 0.4 0.3 0.2 0.1 0 -0.1
-0.03 -0.05 -0.07 -0.09 -0.11 -0.13 -0.15 0 1 2 3 4 5 6 7 8 9 10 11
-0.2 0 1 2 3 4 5 6 STEP 7 8 9 10 11
STEP
FIGURE 11. DIFFERENTIAL GAIN
FIGURE 12. DIFFERENTIAL PHASE
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FN6267.1 June 11, 2008
ISL59832 Typical Performance Curves
VCP = VS = 3.3V, CF = 0.1F, CS = 0.22F, CFIL = 0.4F, CIN1= CIN2 = 0.1F, RL1= RL2 = 150.
TIME SCALE = 5s/DIV CH1 = 1V/DIV CH2 = 1V/DIV
TIME SCALE = 10ns/DIV CH1 = 1V/DIV CH2 = 1V/DIV DISABLE SIGNAL
ENABLE SIGNAL
TIME = 35s
OUTPUT SIGNAL OUTPUT SIGNAL
FIGURE 13. DISABLE TIME
FIGURE 14. ENABLE TIME
TIME SCALE = 500ns/DIV IN = CH1 = 200mV/DIV OUT = CH2 = 500mV/DIV INPUT
TIMEBASE = 100ns/DIV IN = CH1 = 200mV/DIV OUT = CH2 = 500mV/DIV
INPUT
OUTPUT
OUTPUT
FIGURE 15. 12.5T RESPONSE
FIGURE 16. 2T RESPONSE
TIME SCALE = 10s/DIV IN = CH1 = 500mV/DIV OUT = CH2 = 1V/DIV
LUMA OUTPUT CHANNEL 1
TIME SCALE = 10s/DIV LUMA OUT = 500mV/DIV CHROMA OUT = 500mV/DIV
INPUT
CHROMA OUTPUT CHANNEL 2
OUTPUT
FIGURE 17. NTSC COLORBAR
FIGURE 18. S-VIDEO SCOPE SHOT
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FN6267.1 June 11, 2008
ISL59832 Typical Performance Curves
VCP = VS = 3.3V, CF = 0.1F, CS = 0.22F, CFIL = 0.4F, CIN1= CIN2 = 0.1F, RL1= RL2 = 150.
INPUT = NTSC VIDEO + 2Hz SQUARE WAVE (BEFORE COUPLING CAPACITOR) VIDEO SIGNAL TIME SCALE = 5s/DIV OUT = 500mV/DIV SYNC_OUT = 500mV/DIV TIMEBASE = 1ms/DIV INPUT: 500mV/DIV OUTPUT: 500mV/DIV
CHANNEL 1 OUTPUT
SYNC_OUT
FIGURE 19. SYNC_OUT SIGNAL
FIGURE 20. LUMA CLAMP RESPONSE TO POSITIVE TRANSIENT (CHANNEL 1)
INPUT = NTSC VIDEO + 2Hz SQUARE WAVE (BEFORE COUPLING CAPACITOR)
INPUT = NTSC S-VIDEO (CHROMA) + 2Hz SQUARE WAVE (BEFORE COUPLING CAPACITOR)
CHANNEL 1 OUTPUT
TIMEBASE = 200s/DIV INPUT: 500mV/DIV OUTPUT: 500mV/DIV
TIMEBASE = 2ms/DIV INPUT: 500mV/DIV OUTPUT: 500mV/DIV
CHANNEL 2 OUTPUT
FIGURE 21. LUMA CLAMP RESPONSE TO NEGATIVE TRANSIENT (CHANNEL 1)
FIGURE 22. CHROMA CLAMP RESPONSE TO POSITIVE TRANSIENT (CHANNEL 2)
INPUT = NTSC S-VIDEO (CHROMA) + 2Hz SQUARE WAVE (BEFORE COUPLING CAPACITOR)
100 RMS NOISE = 1.31mV OUTPUT REFERRED 10 V/Hz CHARGE PUMP NOISE, CONTRIBUTES ONLY A SMALL PERCENTAGE OF THE OVERALL NOISE
TIMEBASE = 2ms/DIV INPUT: 500mV/DIV OUTPUT: 500mV/DIV CHANNEL 2 OUTPUT
1
0.1
0.01
0M
2M
4M
6M
8M 10M 12M 14M 16M 18M 20M FREQUENCY (Hz)
FIGURE 23. CHROMA CLAMP RESPONSE TO NEGATIVE TRANSIENT (CHANNEL 2)
FIGURE 24. NOISE SPECTRUM
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FN6267.1 June 11, 2008
ISL59832 Typical Performance Curves
TIME SCALE = 20ns/DIV VERTICAL SCALE = 20mV/DIV
VCP = VS = 3.3V, CF = 0.1F, CS = 0.22F, CFIL = 0.4F, CIN1= CIN2 = 0.1F, RL1= RL2 = 150.
0 VS = VCP = +3.3V -10 RL = 150 VOUT = 0 TO 2VP, SINE WAVE -20 THD (dBc) -30 -40 -50 -60 -70 0.5 0.8 1.1 1.4 1.7 2.0 fIN = 500kHz fIN = 5MHz
OUTPUT VOLTAGE (V)
FIGURE 25. CHARGE PUMP FEEDTHROUGH AT AMPLIFIER OUTPUT
FIGURE 26. THD (dBc) vs OUTPUT VOLTAGE (VP-P)
4.5 POWER DISSIPATION (W) 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 85 90 AMBIENT TEMPERATURE (C) 16 LD TQFN PACKAGE 4mmx4mm JA = +46C/W
FIGURE 27. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
Description of Operation and Application Information Theory of Operation
The ISL59832 is a single supply video driver with a reconstruction filter and an on-board charge pump. It is designed to drive SDTV displays with S-video (Y-C) or composite video (CV) signals. The input signals can be AC or DC-coupled. When AC-coupled, a sync tip clamp forces the blank level to ground at the output of Channel 1 and a keyed clamp forces the average level of Channel 2 to ground. The ISL59832 is capable of driving two AC- or DCcoupled standard video loads and has a 4th order Butterworth reconstruction filter with nominal -3dB frequency set to 10MHz, providing 40dB of attenuation at 27MHz. The ISL59832 is designed to operate with a single supply voltage range ranging from 3.0V to 3.6V. This eliminates the need for a split supply with the incorporation of a charge pump capable of generating a bottom rail as much as 1.5V below ground; providing a 4.8V range on a single 3.3V supply. This performance is ideal for NTSC video with negative-going sync pulses. signal into a 150 load to ground, while the Channel 2 amplifier is able to drive a 2.8VP-P into a 150 or 75 load to ground. The outputs are highly-stable, low distortion, low power, high frequency amplifiers capable of driving moderate (10pF) capacitive loads.
Input/Output Range
The ISL59832 inputs have a dynamic range of 0 to 1.4VP-P. This allows the device to handle the maximum possible video signal inputs. As the input signal moves outside the specified range, the output signal will exhibit increasingly higher levels of harmonic distortion.
The Charge Pump
The ISL59832 charge pump provides a bottom rail up to 1.5V below ground while operating on a 3.0V to 3.6V power supply. The charge pump is driven by an internal 13MHz clock. To reduce the noise on the power supply generated by the charge pump connect a lowpass RC-network between
Output Amplifier
The ISL59832 output amplifiers provide a gain of +6dB. The Channel 1 output amplifier is able to drive a 2.8VP-P video 11
FN6267.1 June 11, 2008
ISL59832
VEEOUT and VEEIN. See the Typical Application Circuit for further information. SYNC DETECTOR AND CLAMP TIMING Channel 1 and Channel 3 also have sync detectors whose outputs are available at SYNC_OUT. The slice level for the sync detector is between 100 to 200mV. This means that if the signal level is below 100mV at Channel 1, then SYNC_OUT is high. If the signal level is above 200mV then SYNC_OUT is low. Figure 28 shows the operation of the sync detector.
NTSC LUMINANCE CHANNEL 1 INPUT +1.00V
VEEOUT Pin
VEEOUT is the output pin for the charge pump. Keep in mind that the output of this pin is a fully regulated supply that must be properly bypassed. Bypass this pin with a 0.47F ceramic capacitor placed as close to the pin and connected to the ground plane of the board.
VEEIN Pin
VEEIN is the subtrate connection for the ISL59832. To reduce the noise on the power supply generated by the charge pump, connect a lowpass RC-network between VEEOUT and VEEIN. See the "S-Video Typical Application Circuit" on page 6 for further information.
+300mV 100mV < VSLICE < 200mV +0mV
Video Performance
DIFFERENTIAL GAIN/PHASE For good video performance, an amplifier is required to maintain the same output impedance and the same frequency and phase response as DC levels are changed at the output. Special circuitry has been incorporated into the ISL59832 to reduce the output impedance variation with the current output. This results in outstanding differential gain and differential phase specifications of 0.45% and 0.15, while driving 150 at a gain of +2V/V. NTSC The ISL59832, generating a negative rail internally, is ideally suited for NTSC video with its accompanying negative-going sync signals. S-VIDEO For a typical S-video application, connect the luma signal to Channel 1, and connect the chrominance signal to Channel 2. For clamp timing connect SYNC_OUT to SYNC_IN. See the "S-Video Typical Application Circuit" on page 6.
SYNC_OUT
+3.3V +0mV
FIGURE 28. SYNC DETECTOR SLICE LEVEL
DC-Coupled Inputs (Channel 1)
When DC-coupling the inputs ensure that the lowest signal level is greater than +50mV to prevent the clamp from turning on and distorting the output. When DC-coupled the ISL59832 shifts the signal by -620mV.
Amplifier Disable
The ISL59832 can be disabled and its outputs placed in high impedance states. The turn-off time is around 10ns and the turn-on time is around 35s. The turn-on time is longer because extra time is needed for the charge pump to settle before the amplifiers are enabled. When disabled, the device supply current is reduced to 2A typically, reducing power consumption. The device's power-down can be controlled by standard TTL or CMOS signal levels at the ENABLE pin. The applied logic signal is relative to the GND pin. Applying a signal that is less than 0.8V above GND will disable the device. The device will be enabled when the ENABLE signal is 2V above GND.
AC-Coupled Inputs
SYNC TIP CLAMP (CHANNEL 1) The ISL59832 features a sync tip clamp that sets the black level of the output video signal to ground. This ensures that the sync-tip voltage level will be approximately -300mV at the back-termination resistor of a standard video load. The clamp is activated whenever the input voltage falls below 0V. The correction voltage required to do this is stored across the input AC-coupling capacitor. Refer to "S-Video Typical Application Circuit" on page 6 for a detailed diagram. KEYED CLAMP (CHANNEL 2) Channel 2 has a keyed clamp which sets the output to ground when SYNC_IN is driven to the logic high state. SYNC_IN may be connected to SYNC_OUT which ensures that Channel 2 clamps during the sync interval for Y-C applications. 12
Output Drive Capability
The maximum output current for the ISL59832 is 50mA. Maximum reliability is maintained if the output current never exceeds 50mA, after which the electro-migration limit of the process will be exceeded and the part will be damaged. This limit is set by the design of the internal metal interconnections.
Driving Capacitive Loads and Cables
The ISL59832, internally-compensated to drive 75 cables, will drive 10pF loads in parallel with 150 or 75 with less than 1.3dB of peaking.
FN6267.1 June 11, 2008
ISL59832
Power Dissipation
With the high output drive capability of the ISL59832, it is possible to exceed the +150C absolute maximum junction temperature under certain load current conditions. Therefore, it is important to calculate the maximum junction temperature for an application to determine if load conditions or package types need to be modified to assure operation of the amplifier in a safe operating area. The maximum power dissipation allowed in a package is determined according to Equation 1:
T JMAX - T AMAX PD MAX = ------------------------------------------- JA (EQ. 1)
By setting Equation 1 equal to Equation 2 and 3, we can solve for the output current and RLOAD values needed to avoid exceeding the maximum junction temperature.
Power Supply Bypassing and Printed Circuit Board Layout
As with any high frequency device, a good printed circuit board layout is necessary for optimum performance. Strip line design techniques are recommended for the input and output signal traces to help control the characteristic impedance. Furthermore, the characteristic impedance of the traces should be 75. Trace lengths should be as short as possible between the output pin and the series 75 resistor. The power supply pin must be well bypassed to reduce the risk of oscillation. For normal single supply operation, a single 4.7F tantalum capacitor in parallel with a 0.1F ceramic capacitor from VS and VCP to GND will suffice. The AC performance of this circuit depends greatly on the care taken in designing the PC board. The following are recommendations to achieve optimum high frequency performance from your PC board. * Use low inductance components, such as chip resistors and chip capacitors whenever possible. * Minimize signal trace lengths. Trace inductance and capacitance can easily limit circuit performance. Avoid sharp corners; use rounded corners when possible. Vias in the signal lines add inductance at high frequency and should be avoided. PCB traces longer than 1" begin to exhibit transmission line characteristics with signal rise/fall times of 1ns or less. To maintain frequency performance with longer traces, use striplines. * Match channel-to-channel analog I/O trace lengths and layout symmetry. This will minimize propagation delay mismatches. * Route all signal I/O lines over continuous ground planes (i.e. no split planes or PCB gaps under these lines). * Place termination resistors in their optimum location as close to the device as possible. * Use good quality connectors and cables, matching cable types and keeping cable lengths to a minimum when testing. * Place flying and output capacitor as close to the device as possible for the charge pump. * Decouple well, using a minimum of 2 power supply decoupling capacitors, placed as close to the device as possible. Avoid vias between the capacitor and the device because vias adds unwanted inductance. Larger caps may be farther away. When vias are required in a layout, they should be routed as far away from the device as possible.
Where: TJMAX = Maximum junction temperature TAMAX = Maximum ambient temperature JA = Thermal resistance of the package The maximum power dissipation actually produced by an IC is the total quiescent supply current times the total power supply voltage, plus the power in the IC due to the load, or: for sourcing:
V OUT i PD MAX = V S x I SMAX + ( V S - V OUT i ) x ----------------RL i (EQ. 2)
for sinking:
PD MAX = V S x I SMAX + ( V OUT i - V S ) x I LOAD i (EQ. 3)
Where: VS = Supply voltage ISMAX = Maximum quiescent supply current VOUT = Maximum output voltage of the application RLOAD = Load resistance tied to ground ILOAD = Load current i = Number of output channels
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 13
FN6267.1 June 11, 2008
ISL59832 QFN (Quad Flat No-Lead) Package Family
A D N (N-1) (N-2) B
MDP0046
QFN (QUAD FLAT NO-LEAD) PACKAGE FAMILY (COMPLIANT TO JEDEC MO-220) MILLIMETERS SYMBOL QFN44 QFN38 A 0.90 0.02 0.25 0.20 7.00 5.10 7.00 5.10 0.50 0.55 44 11 11 0.90 0.02 0.25 0.20 5.00 3.80 7.00 5.80 0.50 0.40 38 7 12 QFN32 0.90 0.02 0.23 0.20 8.00 0.90 0.02 0.22 0.20 5.00 TOLERANCE 0.10 +0.03/-0.02 0.02 Reference Basic Reference Basic Reference Basic 0.05 Reference Reference Reference NOTES 8 8 4 6 5
1 2 3
A1
PIN #1 I.D. MARK E
b c D D2 E
(N/2)
5.80 3.60/2.48 8.00 6.00
2X 0.075 C
E2
2X 0.075 C
5.80 4.60/3.40 0.80 0.53 32 8 8 0.50 0.50 32 7 9
e L N ND
TOP VIEW N LEADS
0.10 M C A B (N-2) (N-1) N b
NE
L
PIN #1 I.D. 3 1 2 3
MILLIMETERS SYMBOL QFN28 QFN24 A A1 b c 0.90 0.02 0.25 0.20 4.00 2.65 5.00 3.65 0.50 0.40 28 6 8 0.90 0.02 0.25 0.20 4.00 2.80 5.00 3.80 0.50 0.40 24 5 7 QFN20 0.90 0.02 0.30 0.20 5.00 3.70 5.00 3.70 0.65 0.40 20 5 5 0.90 0.02 0.25 0.20 4.00 2.70 4.00 2.70 0.50 0.40 20 5 5 QFN16 0.90 0.02 0.33 0.20 4.00 2.40 4.00 2.40 0.65 0.60 16 4 4
TOLERANCE NOTES 0.10 +0.03/ -0.02 0.02 Reference Basic Reference Basic Reference Basic 0.05 Reference Reference Reference 4 6 5
(E2)
NE 5 (N/2)
D D2
(D2) BOTTOM VIEW
7
E E2 e L
e C SEATING PLANE 0.08 C N LEADS & EXPOSED PAD
0.10 C
N ND NE
Rev 11 2/07
SEE DETAIL "X" SIDE VIEW
NOTES: 1. Dimensioning and tolerancing per ASME Y14.5M-1994. 2. Tiebar view shown is a non-functional feature. 3. Bottom-side pin #1 I.D. is a diepad chamfer as shown. 4. N is the total number of terminals on the device.
(c) C A
2
5. NE is the number of terminals on the "E" side of the package (or Y-direction). 6. ND is the number of terminals on the "D" side of the package (or X-direction). ND = (N/2)-NE. 7. Inward end of terminal may be square or circular in shape with radius (b/2) as shown. 8. If two values are listed, multiple exposed pad options are available. Refer to device-specific datasheet.
(L) A1 DETAIL X N LEADS
14
FN6267.1 June 11, 2008

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